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8 Mbit (x16) Multi-Purpose Flash Plus
A Microchip Technology Company
SST39VF801C / SST39VF802C / SST39LF801C / SST39LF802C
Data Sheet
Power Up Specifications
All functionalities and DC specifications are specified for a V DD ramp rate of greater than 1V per 100
ms (0V to 3V in less than 300 ms). If the VDD ramp rate is slower than 1V per 100 ms, a hardware
reset is required. The recommended V DD power-up to RESET# high time should be greater than 100
μs to ensure a proper reset.
T PU-READ 1 00 μs
V DD
RESET#
0V
V DD min
V IH
T RHR 5 0ns
CE#
1434 F24.0
Figure 5: Power-Up Diagram
Table 13: DC Operating Characteristics V DD = 2.7-3.6V 1
Limits
Symbol
Parameter
Min
Max
Units
Test Conditions
I DD
Power Supply Current
Address input=V ILT /V IHT2 , at f=5 MHz,
V DD =V DD Max
Read 3
Program and Erase
18
30
mA
mA
CE#=V IL , OE#=WE#=V IH , all I/Os open
CE#=WE#=V IL , OE#=V IH
I SB
Standby V DD Current
20
μA
CE#=V IHC , V DD =V DD Max
RST#=V DD ±0.3, WP#=V DD ±0.3,
WE#=V DD ±0.3
I ALP
Auto Low Power
20
μA
CE#=V ILC , V DD =V DD Max
All inputs=V SS or V DD, WE#=V IHC
I LI
I LIW
Input Leakage Current
Input Leakage Current
1
10
μA
μA
V IN =GND to V DD , V DD =V DD Max
WP#=GND to V DD or RST#=GND to V DD
on WP# pin and RST#
I LO
V IL
V ILC
Output Leakage Current
Input Low Voltage
Input Low Voltage (CMOS)
10
0.8
0.3
μA
V
V
V OUT =GND to V DD , V DD =V DD Max
V DD =V DD Min
V DD =V DD Max
V IH
V IHC
Input High Voltage
Input High Voltage (CMOS)
0.7V DD
V DD -0.3
V DD +0.3
V DD +0.3
V
V
V DD =V DD Max
V DD =V DD Max
V OL
V OH
Output Low Voltage
Output High Voltage
V DD -0.2
0.2
V
V
I OL =100 μA, V DD =V DD Min
I OH =-100 μA, V DD =V DD Min
T13.8 25041
1. Typical conditions for the Active Current shown on the front page of the data sheet are average values at 25°C
(room temperature), and V DD = 3V. Not 100% tested.
2. See Figure 20
3. The I DD current listed is typically less than 2mA/MHz, with OE# at V IH. Typical V DD is 3V.
?2011 Silicon Storage Technology, Inc.
17
DS25041A
05/11
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